Bluetooth technology has come a long way since its inception, and it continues to evolve to meet the demands of modern connectivity. With the advent of Bluetooth Low Energy (LE) and the subsequent introduction of Long Range (LE Long Range), wireless communication has become more versatile and efficient than ever. In this article, we'll delve into the capabilities of the CYW20829 Infineon Bluetooth Discrete Chip, which promises long-range connectivity and low power consumption for a wide range of applications.
Bluetooth LE and LE Long Range Bluetooth Low Energy, often referred to as Bluetooth LE or BLE, was introduced to enable power-efficient communication between devices. It quickly gained popularity for applications such as fitness trackers, smartwatches, and IoT devices. The technology allows devices to transmit data over short distances while conserving energy, making it ideal for battery-powered devices. LE Long Range is an extension of Bluetooth LE that focuses on extending the communication range without compromising power efficiency. This makes it suitable for applications that require communication over greater distances, such as home automation and asset tracking. Now, let's take a closer look at the CYW20829 Infineon Bluetooth Discrete Chip, a high-performance solution that harnesses the power of Bluetooth LE and LE Long Range, while also excelling in low energy consumption and CPU capabilities. The CYW20829 Infineon Bluetooth Discrete ChipIn conclusion, the CYW20829 Infineon Bluetooth Discrete Chip is a powerful and versatile solution in the realm of Bluetooth technology. With its long-range capabilities, low power consumption, and comprehensive set of features, it caters to a broad spectrum of applications, from IoT devices to automotive and home automation. As technology continues to advance, chips like the CYW20829 play a crucial role in driving innovation and connectivity forward. Its integration of a high-performance MCU and Bluetooth LE ensures that it is well-equipped to meet the evolving demands of the Internet of Things and other wireless communication applications.
Features
• 32-bit application core subsystem
- 96-MHz Arm® Cortex®-M33 CPU with single-cycle multiply and memory protection unit (MPU)
- ARMv8-M architecture
- CMOS 40-nm process
- User-selectable core logic operation at either 1.1 V or 1.0 V
- Active CPU current slope with 1.1 V core operation
• Cortex®-M33: 40 µA/MHz
- Active CPU current slope with 1.0 V core operation
• Cortex®-M33: 22 µA/MHz
- Datawire (DMA) controller with 16 channels
- 32-KB cache for greater XIP performance with lower power
• Memory subsystem
- 256-KB SRAM with power and data retention control
- OTP eFuse array for security provisioning
• Bluetooth® Low Energy subsystem
- 2.4-GHz RF transceiver with 50-Ω antenna drive
- Digital PHY
- Link layer engine supporting master and slave modes
- Programmable TX power: up to 10 dBm
- RX sensitivity:
• LE-1 Mbps: -98 dBm
• LE-2 Mbps: -95 dBm
• Coded PHY 500 kbps (LE-LR): –101 dBm
• Coded PHY 125 kbps (LE-LR): –106 dBm
- 5.2-mA TX (0 dBm), 17.2 mA TX (10 dBm), and 5.6 mA RX (LE 1 Mbps) current with 3.0 V supply and using internal
buck converter
- Link layer engine supports up to 16 connections simultaneously, four are peripheral
• Low-power 1.7 V to 3.6 V operation
- Six power modes for fine-grained power management
- Deep Sleep mode current of 4.5 µA with 64 KB SRAM retention
- On-chip DC-DC buck converter
Datasheet 2 002-31976 Rev. *F
2023-09-26
AIROC™ Bluetooth® LE 5.4 MCU
Features
• Flexible clocking options
- 8-MHz internal main oscillator (IMO) with ±2% accuracy
- Ultra-low-power 32-kHz internal low-speed oscillator (ILO)
- Two oscillators: High-frequency (24-MHz) for radio PLL and low-frequency (32-kHz watch crystal) for LPO
- 48-MHz low power IHO (internal oscillator)
- Frequency-locked loop (FLL) for multiplying IMO frequency
- Integer and fractional peripheral clock dividers
• Quad SPI (QSPI)/serial memory interface (SMIF)
- eXecute-In-Place (XIP) from external quad SPI flash
- On-the-fly encryption and decryption
- Support for DDR
- Supports single, dual, and quad interfaces with throughput up to 384-Mbps
• Serial Communication
- Three run-time configurable Serial Communication Blocks (SCBs)
• First SCB: Configurable as SPI or I2C
• Second SCB: Configurable as SPI or UART
• Third SCB: Configurable as I2
C or UART
• Audio subsystem
- Two pulse density modulation (PDM) channels and one I2
S channel with time division multiplexed (TDM) mode
• Timing and pulse-width modulation
- Seven 16-bit and two 32-bit Timer/Counter Pulse-Width Modulator (TCPWM) blocks, for MCU. Multiple PWMs
needed for color LEDs.
- PWM supports center-aligned, edge, and pseudo-random modes
• ADC and MIC
- Sigma-delta switched cap ADC for audio and DC measurements
• Up to 32 programmable GPIOs
- One I/O port (8 I/Os) enables Boolean operations on GPIO pins; available during system Deep Sleep
- Programmable drive modes, strengths, and slew rates
- Two overvoltage-tolerant (OVT) pins
- Up to six, used for SMIF
• Security built into platform architecture
- ROM-based root of trust via uninterruptible “Secure Boot”
- Step-wise authentication of execution images
- Secure execution of code in execute-only mode for protected routines
- All debug and test ingress paths can be disabled
- Up to four protection contexts (One available for customer code)
- Secure debug support via authenticated debug token
- Encrypted image support for external SMIF memory
• Cryptography hardware
- Hardware Acceleration for symmetric cryptographic methods and hash functions
- True Random Number Generation (TRNG) function
• Packages
- 56-QFN 6 mm X 6 mm
Datasheet 3 002-31976 Rev. *F
2023-09-26
AIROC™ Bluetooth® LE 5.4 M