Samsung Tapes Out First 3nm Smartphone SoC, Gets A Boost From Synopsys AI-Enabled Tools
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Name
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Samsung
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Founded
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1938
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Industry
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Conglomerate
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Headquarters
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Seoul, South Korea
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Founders
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Lee Byung-chul
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Key Products
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Electronics, Mobile Devices, Home Appliances, Semiconductors
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Revenue
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$207.7 billion (2020)
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Employees
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320,671 (2020)
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Website
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https://www.samsung.com
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Samsung has successfully taped out its first 3nm smartphone System-on-Chip (SoC) with the help of Synopsys' AI-enabled tools. The achievement marks a significant milestone in the development of advanced silicon technology.
Taping out refers to the completion of the SoC's design phase, allowing the manufacturing process to begin. The 3nm SoC represents a leap forward in terms of performance, power efficiency, and transistor density compared to previous generations.
Samsung's collaboration with Synopsys, a leading electronic design automation company, enabled the use of AI-enhanced tools throughout the design process. These tools leverage machine learning algorithms to optimize power, performance, and area parameters, accelerating the development cycle.
The deployment of AI-enabled tools brings multiple benefits to the design process. By analyzing large volumes of data, the tools can identify patterns and make accurate predictions, aiding in the optimization of chip performance. They can also help designers identify and correct potential issues earlier, reducing design iterations and time-to-market.
As process nodes continue to shrink, the challenges in chip design and manufacturing become more complex. The use of AI and machine learning enables designers to overcome these challenges by quickly adapting to the requirements of cutting-edge technology.
The successful tape-out of Samsung's 3nm SoC demonstrates the company's commitment to pushing the boundaries of mobile processor technology. As smartphone capabilities continue to expand, advancements in chip design and fabrication are crucial to deliver the enhanced performance and features that consumers expect.
Samsung's 3nm SoC, developed with the assistance of Synopsys' AI-enabled tools, is expected to provide significant improvements in power efficiency, allowing for longer battery life and better overall user experience. With the tape-out completed, the next stage involves the production and integration of the SoC into Samsung's next generation smartphones.
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| Q: What was announced by Samsung Electronics and Synopsys this week? |
A: Samsung has taped out its first mobile system-on-chip on Samsung Foundry's 3nm gate-all-around (GAA) process technology. |
| Q: What EDA suite did Samsung use for the design of the SoC? |
A: Samsung used the Synopsys.ai EDA suite to place-n-route the layout and verify design of the SoC. |
| Q: What benefits were achieved by using the Synopsys.ai EDA software? |
A: The software enabled higher performance, maximizing yields, achieving lower power, and optimizing area (PPA). |
| Q: Which architectures were utilized in Samsung's high-performance mobile SoC? |
A: The SoC relied on 'flagship' general-purpose CPU and GPU architectures as well as various IP blocks from Synopsys. |
| Q: What is significant about Samsung's announcement of taping out a smartphone application processor on its 3nm GAAFET process? |
A: Samsung has not previously used this technology for its own system-on-chips, making this an important milestone for the company. |
| Q: Which process node is being used for the SoC? |
A: The specific process node is not disclosed, but it is mentioned that it's for a GAA process node. |
| Q: What performance improvements were credited to Synopsys' tools? |
A: The tools improved the chip's peak clockspeed by 300MHz and reduced dynamic power usage by 10%. |
| Q: How did Samsung achieve these improvements in their SoC design? |
A: Samsung used design partitioning optimization, multi-source clock tree synthesis (MSCTS), smart wire optimization, and a simpler hierarchical approach. |
| Q: What did Samsung's tooling partnership with Synopsys allow them to do? |
A: Through the partnership, Samsung was able to skip weeks of 'manual' design work. |
| Q: What did Kijoon Hong, vice president of SLSI at Samsung Electronics, say about the collaboration with Synopsys? |
A: He stated that the collaboration has delivered leading-edge SoC designs and established an ultra-high-productivity design system. |
| This week Samsung Electronics and Synopsys announced that Samsung has successfully developed its first mobile system-on-chip (SoC) using Samsung Foundry's 3nm gate-all-around (GAA) process technology. The collaboration involved utilizing the Synopsys.ai EDA suite to optimize the layout and design of the SoC, resulting in improved performance. Samsung's high-performance mobile SoC incorporates flagship CPU and GPU architectures, as well as various IP blocks from Synopsys. |
| The SoC designers utilized Synopsys.ai EDA software, including the Synopsys DSO.ai and Synopsys Fusion Compiler RTL-to-GDSII solution, to fine-tune the design, maximize yields, achieve higher performance, lower power consumption, and optimize the area. This milestone also marks the first time Samsung has used the GAA-equipped SF3E process for its own system-on-chips. |
| Samsung Foundry's SF3E, a 3nm-class 'early' node process, has been primarily used for cryptocurrency mining chips. However, the company's more advanced SF3 manufacturing technology, offering numerous improvements over SF3E, is set to be used for mass production in the near future. Although the specific process node used for the SoC is undisclosed, it is speculated that SF3 is being employed. |
| The partnership between Samsung and Synopsys has proven instrumental in enhancing the chip's design. Synopsys' tools have been credited with boosting the chip's peak clockspeed by 300MHz and reducing dynamic power usage by 10%. This was achieved through design partitioning optimization, multi-source clock tree synthesis, smart wire optimization, and a simplified hierarchical approach. Utilizing Synopsys Fusion Compiler also allowed the avoidance of weeks of manual design work. |
| Kijoon Hong, VP of SLSI at Samsung Electronics, emphasized the significance of the collaboration: "Our longstanding collaboration has delivered leading-edge SoC designs. This is a remarkable milestone to successfully achieve the highest performance, power, and area on the most advanced mobile CPU cores and SoC designs in collaboration with Synopsys. Not only have we demonstrated that AI-driven solutions can help us achieve PPA targets for even the most advanced GAA process technologies, but through our partnership we have established an ultra-high-productivity design system that is consistently delivering impressive results." |
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Samsung has achieved a significant milestone in the smartphone industry by successfully taping out its first 3nm (nanometer) System-on-Chip (SoC) for smartphones. This accomplishment has been further enhanced by leveraging the advanced AI-enabled tools provided by Synopsys, a leading electronic design automation company.
The transition to the 3nm process technology represents a major leap forward in the semiconductor industry, enabling more advanced and power-efficient mobile devices. Samsung's 3nm SoC promises to deliver significant improvements in performance, power efficiency, and overall user experience.
By collaborating with Synopsys and utilizing their AI-enabled design tools, Samsung has been able to streamline the complex process of developing advanced semiconductor chips. The AI-enabled tools provided by Synopsys offer powerful features such as machine learning algorithms, intelligent optimization, and automated design techniques.
These tools allow Samsung engineers to accelerate design validation, optimize power and performance, and detect potential issues at an early stage of the chip development cycle. By leveraging AI capabilities, time-to-market is reduced and overall design quality is improved.
The collaboration between Samsung and Synopsys signifies the growing importance of AI-driven design methodologies in the semiconductor industry. As chip designs become increasingly complex, AI-enabled tools play a crucial role in achieving efficient and reliable designs.
With the successful tapeout of the 3nm smartphone SoC, Samsung solidifies its position as a leader in semiconductor technology and reinforces its commitment to innovation. The next-generation smartphones powered by the 3nm SoC are expected to deliver significant advancements in processing power, energy efficiency, and advanced AI capabilities.
The collaboration between Samsung and Synopsys sets the stage for further advancements in the smartphone industry. As technology continues to evolve, we can expect more cutting-edge innovations that redefine the boundaries of mobile devices.
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