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  • UAV communication : ground, air and satellite review
  • What is LORA?
  • Software defined radios as cognitive relays for satellite ground stations incurring terrestrial interference
  • Stream live camera with Raspbeery pi to youtube LIVE!
  • How to make widnows host act as a file repository
  • Command line for installing gnuradio with uhd on ubuntu 14.04 tested
  • Broad cast a text file from one USRP to another SDR (HACKRF)
  • Auto script run on linux startup + auto login user )
  • Wideband channel sounding using software defined radios
  • Transparent plot in MATLAB)
  • Rohde & Schwarz TS-5GCS connection problem(solved)
  • Optimization problems with solution
  • MATLAB to GNURadio converter functions .mat to gnuradio
  • FM transmitter with HackRF SDR
  • Error probability for QPSK in Rayleigh fading channel vs AWGN channel
  • Compare SDRs: USRP 2901 vs B210 vs N210 vs BladeRF
  • Basics of satellite communication(impairments and mitigation techniques)
  • Advance Design System (ADS) software examples RF circuit design for wireless communication
  • SDcard problem (visibility) in windows
  • SDR operates as a relay (USRP) full duplex OFDM
  • Instaling two, three more USRP in Linux Ubuntu
  • Build home made camera stream online youtube throught linux

  • Welcome to my personal webpage

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    Ph.D.
    Postdoctoral Fellow
    Electrical & Computer Engineering
    University of South Carolina
    Feel free to contact me through email
    nozhan.hosseini (at) studio.unibo.it



  • Please watch the tutorial video first:

    You can find the code below:

    E:\Users\admin\MPLABXProjects\LED_blink.X\newmainXC16.c
     1 /*
     2  * File:   newmainXC16.c
     3  * Author: admin
     4  *
     5  * Created on January 15, 2021, 10:12 PM
     6  */
     7 
     8 // PIC24FJ128GL302 Configuration Bit Settings
     9 
    10 // 'C' source line config statements
    11 
    12 // FSEC
    13 #pragma config BWRP = OFF               // Boot Segment Write-Protect bit (Boot Segment may be written)
    14 #pragma config BSS = DISABLED           // Boot Segment Code-Protect Level bits (No Protection (other than BWRP))
    15 #pragma config BSEN = OFF               // Boot Segment Control bit (No Boot Segment)
    16 #pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
    17 #pragma config GSS = DISABLED           // General Segment Code-Protect Level bits (No Protection (other than GWRP))
    18 #pragma config CWRP = OFF               // Configuration Segment Write-Protect bit (Configuration Segment may be written)
    19 #pragma config CSS = DISABLED           // Configuration Segment Code-Protect Level bits (No Protection (other than CWRP))
    20 #pragma config AIVTDIS = OFF            // Alternate Interrupt Vector Table bit (Disabled AIVT)
    21 
    22 // FBSLIM
    23 #pragma config BSLIM = 0x1FFF           // Boot Segment Flash Page Address Limit bits (Enter Hexadecimal value)
    24 
    25 // FOSCSEL
    26 #pragma config FNOSC = OSCFDIV          // Oscillator Source Selection (Oscillator with Divider)
    27 #pragma config PLLMODE = DISABLED       // PLL Mode Selection (No PLL used; PLLEN bit is not available)
    28 #pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)
    29 
    30 // FOSC
    31 #pragma config POSCMD = NONE            // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
    32 #pragma config OSCIOFCN = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
    33 #pragma config SOSCSEL = ON             // SOSC Power Selection Configuration bits (SOSC is used in crystal (SOSCI/SOSCO) mode)
    34 #pragma config PLLSS = PLL_PRI          // PLL Secondary Selection Configuration bit (PLL is fed by the Primary oscillator)
    35 #pragma config IOL1WAY = ON             // Peripheral pin select configuration bit (Allow only one reconfiguration)
    36 #pragma config FCKSM = CSDCMD           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are disabled)
    37 
    38 // FWDT
    39 #pragma config WDTPS = PS32768          // Watchdog Timer Postscaler bits (1:32,768)
    40 #pragma config FWPSA = PR128            // Watchdog Timer Prescaler bit (1:128)
    41 #pragma config FWDTEN = ON              // Watchdog Timer Enable bits (WDT Enabled)
    42 #pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
    43 #pragma config WDTWIN = WIN25           // Watchdog Timer Window Select bits (WDT Window is 25% of WDT period)
    44 #pragma config WDTCMX = WDTCLK          // WDT MUX Source Select bits (WDT clock source is determined by the WDTCLK Configuration bits)
    45 #pragma config WDTCLK = LPRC            // WDT Clock Source Select bits (WDT uses LPRC)
    46 
    47 // FPOR
    48 #pragma config BOREN = ON               // Brown Out Enable bit (Brown Out Enable Bit)
    49 #pragma config LPCFG = OFF              // Low power regulator control (No Retention Sleep)
    50 #pragma config DNVPEN = ENABLE          // Downside Voltage Protection Enable bit (Downside protection enabled using ZPBOR when BOR is inactive)
    51 
    52 // FICD
    53 #pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
    54 #pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)
    55 
    56 // FDMTIVTL
    57 #pragma config DMTIVTL = 0xFFFF         // Deadman Timer Interval Low Word (Enter Hexadecimal value)
    58 
    59 // FDMTIVTH
    60 #pragma config DMTIVTH = 0xFFFF         // Deadman Timer Interval High Word (Enter Hexadecimal value)
    61 
    62 // FDMTCNTL
    63 #pragma config DMTCNTL = 0xFFFF         // Deadman Timer Instruction Count Low Word (Enter Hexadecimal value)
    64 
    65 // FDMTCNTH
    66 #pragma config DMTCNTH = 0xFFFF         // Deadman Timer Instruction Count High Word (Enter Hexadecimal value)
    67 
    68 // FMDT
    69 #pragma config DMTDIS = OFF             // Deadman Timer Enable Bit (Dead Man Timer is Disabled and can be enabled by software)
    70 
    71 // FDEVOPT1
    72 #pragma config ALTCMPI = DISABLE        // Alternate Comparator Input Enable bit (C2INC and C3INC are on their standard pin locations )
    73 #pragma config TMPRPIN = OFF            // Tamper Pin Enable bit (TMPRN pin function is disabled)
    74 #pragma config SOSCHP = ON              // SOSC High Power Enable bit (valid only when SOSCSEL = 1 (Enable SOSC high power mode (default))
    75 #pragma config ALTI2C1 = ALTI2C1_OFF    // Alternate I2C pin Location (I2C1 Pin mapped to SDA1/SCL1 pins)
    76 #pragma config SMB3EN = SMBUS3          // SM Bus Enable (SMBus 3.0 input levels)
    77 
    78 // #pragma config statements should precede project file includes.
    79 // Use project enums instead of #define for ON and OFF.
    80 
    81 
    82 #include "xc.h"
    83 #define _XTAL_FREQ 20000000
    84 int i =0;
    85 void main(void) {
    86     TRISG = 0b00000000;
    87     TRISB = 0b00000000;
    88     while(1){
    89         PORTGbits.RG7 = 1; //This can be any pin connected to LED
    90         for (i=1;i<20000;i++);
    91         PORTGbits.RG7=0;
    92         for (i=1;i<20000;i++);
    93         
    94         return;
    95     
    96     }
    97 }
    98